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    • College of Engineering, University of Wisconsin--Madison
    • Department of Electrical and Computer Engineering
    • Theses--Electrical Engineering
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    Timing False Path Identification using ATPG Techniques

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    Shreyas Parnerkar Project Report Summer 2010 (1.126Mb)
    Date
    2010-08-20
    Author
    Parnerkar, Shreyas Vijay
    Department
    Electrical Engineering
    Advisor(s)
    Davoodi, Azadeh
    Metadata
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    Abstract
    A Project Report submitted to the University of Wisconsin -- Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science Graduate Program in Electrical and Computer Engineering.
    Permanent Link
    http://digital.library.wisc.edu/1793/46187
    Type
    Project Report
    Part of
    • Theses--Electrical Engineering

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