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dc.contributor.authorTsai, Jeng-Liangen_US
dc.contributor.authorBaik, Dong Hyunen_US
dc.contributor.authorChen, Charlie Chung-Pingen_US
dc.contributor.authorSaluja, Kewal K.en_US
dc.date.accessioned2007-07-13T19:27:20Z
dc.date.available2007-07-13T19:27:20Z
dc.date.issued2005en_US
dc.identifier.citationTsai, J.L., Dong, B. Hyun, C., Charlie C.P., & Saluja, K. K. (2005). Yield Driven, False Path Aware Clock Skew Scheduling. Ieee Design And Test Of Computers, 22(3), 214-222.en_US
dc.identifier.urihttp://digital.library.wisc.edu/1793/10316
dc.descriptionThis material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en_US
dc.format.extent148821 bytes
dc.format.mimetypeapplication/pdfen_US
dc.format.mimetypeapplication/pdf
dc.publisherInstitute of Electrical and Electronics Engineers Computer Society, Piscataway, NJ 08855-1331, United Statesen_US
dc.relation.ispartofhttp://www.ieee.org/en_US
dc.relation.ispartofhttp://ieeexplore.ieee.org/servlet/opac?punumber=4069487en_US
dc.rightsCopyright 2005 Institute of Electrical and Electronics Engineersen_US
dc.rights©20xx IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_US
dc.titleYield-driven, false-path-aware clock skew schedulingen_US
dc.identifier.doihttp://dx.doi.org/10.1109/MDT.2005.75en_US


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