Yield-driven, false-path-aware clock skew scheduling
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Date
2005Author
Tsai, Jeng-Liang
Baik, Dong Hyun
Chen, Charlie Chung-Ping
Saluja, Kewal K.
Publisher
Institute of Electrical and Electronics Engineers Computer Society, Piscataway, NJ 08855-1331, United States
Metadata
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http://digital.library.wisc.edu/1793/10316Description
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Citation
Tsai, J.L., Dong, B. Hyun, C., Charlie C.P., & Saluja, K. K. (2005). Yield Driven, False Path Aware Clock Skew Scheduling. Ieee Design And Test Of Computers, 22(3), 214-222.